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SN74AVCH2T45DCUR

發布時間:2022/6/14 11:18:00 訪問次數:89

SN74AVCH2T45DCURSN74AVCH2T45 2-Bit, 2-Supply, Bus Transceiver with Configurable Level-Shifting and Translation and 3-State

SN74AVCH2T45 具有可配置電壓轉換和 3 態輸出的雙位雙電源總線收發器

Available in the Texas Instruments NanoFree™ separate configurable power-supply rails. The A ports Package are designed to track VCCA and accepts any supply • VCC Isolation voltage from 1.2 V to 3.6 V. The B ports are designed • 2-Rail Design to track VCCB and accepts any supply voltage from • I/Os are 4.6 V Tolerant 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation and level-shifting between • Partial Power-Down-Mode Operation any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V • Bus Hold on Data Inputs voltage nodes. • Maximum Data Rates

The SN74AVCH2T45 is designed for asynchronous – 500 Mbps (1.8 V to 3.3 V) communication between two data buses. The logic – 320 Mbps (< 1.8 V to 3.3 V) levels of the direction-control (DIR pin) input activate either the B-port outputs or the A-port outputs. The – 320 Mbps (Level-Shifting to 2.5 V or 1.8 V) device transmits data from the A bus to the B bus – 280 Mbps (Level-Shifting to 1.5 V) when the B-port outputs are activated and from the B – 240 Mbps (Level-Shifting to 1.2 V) bus to the A bus when the A-port outputs are activated. The SN74AVCH2T45 features active bus- • Latch-Up Performance Exceeds 100 mA Per hold circuitry, which holds unused or un-driven inputs JESD 78, Class II at a valid logic state. TI does not recommend using • ESD Protection Exceeds JESD 22 pull-up or pull-down resistors with the bus-hold circuitry.

Smartphone PART NUMBER PACKAGE BODY SIZE (NOM) • Servers SSOP (8) 2.95 mm × 2.80 mm • Desktop PCs and Notebooks SN74AVCH2T45 VSSOP (8) 2.30 mm × 2.00 mm • Other Portable Devices DSBGA (8) 1.89 mm × 0.89 mm (1) For all available packages, see the orderable addendum at the end of the data sheet.

SN74AVCH2T45DCUR

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SN74AVCH2T45DCUR

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