AD9690BCPZ-1000FEATURES JESD204B (Subclass 1) coded serial digital outputs 2.0 W total power at 1 GSPS (default settings) 1.5 W total power at 500 MSPS (default settings) SFDR = 85 dBFS at 340 MHz, 80 dBFS at 985 MHz SNR = 65.3 dBFS at 340 MHz (AIN = −1.0 dBFS), 60.5 dBFS at 985 MHz ENOB = 10.8 bits at 10 MHz DNL = ±0.5 LSB INLAD9690BCPZ-1000AD9690BCPZ-1000AD9690BCPZ-1000 = ±2.5 LSB Noise density = −154 dBFS/Hz at 1 GSPS 1.25 V, 2.5 V, and 3.3 V dc supply operation No missing codes Internal ADC voltage reference Flexible input range AD9690-1000: 1.46 V p-p to 1.94 V p-p (1.70 V p-p nominal) AD9690BCPZ-1000AD9690BCPZ-1000AD9690BCPZ-1000

AD9690-500: 1.46 V p-p to 2.06 V p-p (2.06 V p-p nominal) Programmable termination impedance 400 Ω, 200 Ω, 100 Ω, and 50 Ω differential 2 GHz usable analog input full power bandwidth AD9690BCPZ-1000AD9690BCPZ-1000AD9690BCPZ-1000Amplitude detect bits for efficient AGC implementation 2 integrated wideband digital processors 12-bit NCO, up to 4 cascaded half-band filters Differential clock input Integer clock divide by 1, 2, 4, or 8 Flexible JESD204B lane configurations Small signal dither AD9690BCPZ-1000AD9690BCPZ-1000AD9690BCPZ-1000APPLICATIONS Communications Multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTEAD9690BCPZ-1000AD9690BCPZ-1000AD9690BCPZ-1000 General-purpose software radios Ultrawideband satellite receivers Instrumentation Radars Signals intelligence (SIGINT) DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers Wideband digital predistortion