W9825G6KH-5 16*16 SDRAM 現貨優勢 ，原裝正品供應 TELL 17097219357 QQ/VX 736077312

W9825G6KH is a high-speed synchronous dynamic random access memory (SDRAM), organized as

4M words  4 banks  16 bits. W9825G6KH delivers a data bandwidth of up to 200M words per second. To fully comply with the personal computer industrial standard, W9825G6KH is sorted into the following speed grades: -5, -5I, -6, -6I, -6J, -6L, -75, 75J and 75L. The -5/-5I grade parts are compliant to the 200MHz/CL3 specification (the -5I industrial grade which is guaranteed to support -40°C ≤ TA ≤ 85°C). The -6/-6I/-6J/-6L grade parts are compliant to the 166MHz/CL3 specification (the -6I industrial grade which is guaranteed to support -40°C ≤ TA ≤ 85°C, the -6J industrial plus grade which is guaranteed to support -40°C ≤ TA ≤ 105°C). The -75/75J/75L grade parts are compliant to the 133MHz/CL3 specification (the 75J industrial plus grade which is guaranteed to support -40°C ≤ TA ≤ 105°C). The -6L and 75L grade parts support self refresh current IDD6 max. 1.5 mA. Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time. By having a programmable Mode Register, the system can change burst length, latency cycle, interleave or sequential burst to maximize its performance. W9825G6KH is ideal for main memory in high performance applications. 2. FEATURES  3.3V ± 0.3V Power Supply  Up to 200 MHz Clock Frequency  4,194,304 Words  4 Banks  16 Bits Organization  Self Refresh Mode: Standard and Low Power  CAS Latency: 2 and 3  Burst Length: 1, 2, 4, 8 and Full Page  Burst Read, Single Writes Mode  Byte Data Controlled by LDQM, UDQM  Power Down Mode  Auto-precharge and Controlled Precharge  8K Refresh Cycles/64 mS, @ -40°C ≤ TA ≤ 85°C  8K Refresh Cycles/16 mS, @ 85°C < TA ≤ 105°C  Interface: LVTTL  Packaged in TSOP II 54-pin, 400 mil - 0.80, using Lead free materials with RoHS compliant Note: Not support self refresh function with TA > 85°CV SS DQ 15 V SSQ DQ 14 DQ 13 V DDQ DQ 12 DQ 11 V SSQ DQ 10 DQ 9 V DDQ DQ 8 V SS NC UDQM CLK CKE A 12 A 11 A 9 A 8 A 7 A 6 A 5 A 4 V SS 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 V DD DQ 0 DQ 1 DQ 2 V SSQ DQ 3 DQ 4 V DDQ DQ 5 DQ 6 V SSQ DQ 7 V DD LDQM BS 0 BS 1 A 10 / AP A 0 A 1 A 2 A 3 V DD CS RAS CAS WE V DDQ