H9HCNNNFAMALTR-NEE LPDDR4 64G TFBGA200 現貨優勢 需要的老板 采購們 聯系

TELL 17097219357 QQ/VX 736077312

200ball FBGA Specification 64Gb LPDDR4X (x16, 2 Channel, 2 CS) H9HCNNNFAMALTR-NEE H9HCNNNFAMALTR-NME [ LPDDR4X ] · VDD1 = 1.8V (1.7V to 1.95V) · VDD2 = 1.1V (1.06V to 1.17V) · VDDQ = 0.6V (0.57V to 0.65V) · Programmable CA ODT and DQ ODT with VSSQ termination · VOH compensated output driver · Single data rate command and address entry · Double data rate architecture for data Bus; - two data accesses per clock cycle · Differential clock inputs (CK_t, CK_c) · Bi-directional differential data strobe (DQS_t, DQS_c) · DMI pin support for write data masking and DBIdc functionality · Programmable RL (Read Latency) and WL (Write Latency) · Burst length: 16 (default), 32 and On-the-fly - On the fly mode is enabled by MRS · Auto refresh and self refresh supported · All bank auto refresh and directed per bank auto refresh supported · Auto TCSR (Temperature Compensated Self Refresh) · PASR (Partial Array Self Refresh) by Bank Mask and Segment Mask · Background ZQ Calibration