XC3S500E-4PQG208C產品詳情
Spartan®-3系列現場可編程門陣列專門設計用于滿足高容量、成本敏感的消費類電子應用的需求。如表1所示,八人家庭提供的系統門密度范圍為50000至5000000。
Spartan-3系列以早期Spartan IIE系列的成功為基礎,通過增加邏輯資源量、內部RAM容量、I/O總數和整體性能水平,以及改進時鐘管理功能。許多增強源自Virtex®-II平臺技術。這些Spartan-3 FPGA增強,結合先進的工藝技術,提供了比以前更多的功能和每美元帶寬,在可編程邏輯行業樹立了新的標準。
由于其極低的成本,Spartan-3 FPGA非常適合廣泛的消費電子應用,包括寬帶接入、家庭網絡、顯示/投影和數字電視設備。
Spartan-3系列是掩模編程ASIC的優秀替代品。FPGA避免了傳統ASIC的高初始成本、冗長的開發周期和固有的不靈活性。此外,FPGA的可編程性允許在無需更換硬件的情況下在現場進行設計升級,這在ASIC中是不可能的。
XC3S500E-4PQG208C特性
•低成本、高性能的大容量邏輯解決方案,
面向消費者的應用程序
•密度高達74880個邏輯單元
•選擇™ 接口信令
•最多633個I/O引腳
•每I/O 622+Mb/s數據傳輸速率
•18個單端信號標準
•8個差分I/O標準,包括LVD、RSD
•通過數字控制阻抗進行端接
•信號擺動范圍為1.14V至3.465V
•雙數據速率(DDR)支持
•DDR、DDR2 SDRAM支持高達333 Mb/s
•邏輯資源
•具有移位寄存器功能的豐富邏輯單元
•寬、快速多路復用器
•快速前瞻進位邏輯
•專用18 x 18乘法器
•與IEEE 1149.1/1532兼容的JTAG邏輯
•SelectRAM™ 分層存儲器
•高達1872 Kbits的總塊RAM
•高達520 Kbits的總分布式RAM
•數字時鐘管理器(最多四個DCM)
•時鐘偏移消除
•頻率合成
•高分辨率相移
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